1. Smallest 3U 3-slot hybrid system:
1 PICMG 2.30 system slot in the middle, 1 PICMG 2.0 peripheral slot left (for analog/binary I/O, fieldbus interface…), 1 PICMG CPCI-S.0 peripheral slot right (for XMC carrier, PCI Express MiniCard carrier…)
Schroff drawing
2. Standard 3U 8-slot hybrid system:
1 PICMG 2.30 system slot in the middle, 3 PICMG 2.0 peripheral slot left (for analog/binary I/O, fieldbus interfaces…), 4 PICMG CPCI-S.0 peripheral slot right (maximum possible)
Schroff drawing
3. Double CPU 7-slot 3U hybrid system:
1 PICMG 2.0/CPCI-S.0 system slot in the middle, 2 PICMG 2.0 peripheral slots left, 3 PICMG CPCI-S.0 peripheral slots right
Schroff drawing
4. 9-slot 3U hybrid system:
1 PICMG 2.0/CPCI-S.0 system slot in the middle, 2 PICMG 2.0 peripheral slots left, 3 PICMG CPCI-S.0 plus 2 PICMG EXP.0 peripheral slots right
Schroff drawing |