| Packet Switching Backplane - Specification Overview |
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PICMG 2.16 - Packet Switching Backplane specification The CompactPCI Packet Switching Backplane (CompactPCI/PSB) is an extension to the PICMG 2.x family of specifications that overlays a packet-based switching architecture on top of CompactPCI to create an Embedded System Area Network (ESAN). It supplements the robust, reliable and hot-swap capable CompactPCI architecture with the easily integrated, low-cost, high-performance, and extensible Ethernet. This creates a platform well suited to the integration of components for the most demanding systems and empowers system integration and design to ascend to higher layers of the Open Systems Interconnection (OSI) protocol stack, thus reducing system integration time. PICMG 2.17 - CompactPCI StarFabric specification The success of CompactPCI in the communications market is evidence of OEMs using off-the-shelf open standards based products. However, for next generation communication equipment requirements, the bus-based architecture of CompactPCI potentially limits its applicability. StarFabric technology has been designed to provide a seamless migration from today’s bus-based architecture to a robust switch fabric architecture capable of addressing the needs of next generation communication equipment. Open access to this technology ensures that the entire CompactPCI community can benefit from this compatible path forward. The StarFabric Interconnect specification defines redundant, switched, high-speed point-to-point connectivity among some or all slots using StarFabric switch cards. The StarFabric interconnect will coexist with 64 bit PCI, CompactPCI and H.110. Optional compatibility with cPSB (PICMG 2.16) will be specified. Systems, which take advantage of StarFabric features, can be designed to utilize existing single board computers (SBCs) and node cards.Special slot(s) for active switching fabric element(s), which may be redundant, will also be specified. PICMG 2.18 - CompactPCI Serial RapidIO Specification Serial RapidIO technology has been designed to provide a seamless migration from today's bus-based architecture to a robust and widely available switch fabric architecture capable of addressing the needs of next generation communication equipment. Open access to this technology ensures thatthe entire CompactPCI community can benefit from this compatible path forward. Thi specification defines backplane, node board, and switch board requirements that are compatible with both the Serial RapidIO Architecture Specification and appropriate existing PICMG Specifications. It provides designers, manufacturers, and integrators with a common set of requirements for implementing backplanes, boards and chassis to deliver the benefits of Serial RapidIO interconnect, including high bandwidth (up to 20Gbps per slot in each direction), scalability, high-availability features, PCI-compatibility and the ability to carry all required data on a single packet-switched interconnect. The above specifications can be ordered from PICMG. |